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Tampere University Student’s Guide

Study module, curriculum year 2026–2027
STEM-JPY

System-on-Chip Design, At least 120 cr

Tampere University
Description

System-on-Chip (SoC) comprises of processors, memories, special functional blocks and interfaces for external memories, networks, displays and peripherals. They run the world everywhere as the heart of phones, cars, robots, computers, datacenters, buildings, factories, and anywhere for data processing. The most advanced AI-era SoCs can contain tens of billions of transistors and subsystems that were discrete computers just a few years ago. On the other hand, SoCs can be extremely miniaturized to tags and stickers for IoT.

This package of courses covers all essential steps to implement a current, industry relevant SoC. The design flow starts from hardware architecture specification and ends up with testing the manufactured chips in a lab. Large-scale integration of the HW blocks and SW components is one of the differentiating skills taught in Tampere University. The detailed steps are explained in our CS blog how to become a System-on-Chip design expert

In addition to this study module, we encourage students to complete the degree from microelectronics, electronics, embedded systems, computer engineering, robotics or wireless communication.

As a student, we expect you to know the basics of electronics, digital logic, processors, and programming. The students should hold a BSc degree or related skills in computer engineering, electrical engineering, or software engineering. After completing the module, the students will be qualified to pursue a wide range of multi-disciplinary career opportunities in System-on-Chip design. 

Objectives

Baseline learning objectives:

  • Understand the terms, concepts, objectives, and principles of the SoC design
  • Know typical SoC hardware structures, modularity, and design reuse factors
  • Learn how to use at least one relevant IC (Integrated Circuit) technology in SoC design
  • Learn the overall design flow and use the EDA (Electronic Design Automation) tools
  • Can perform design of a SoC including digital and analog blocks, clock, reset, test structures and related HW Abstraction (HAL) software layers
  • Carry out hands-on SoC tapeout for chip manufacturing
  • Test the sample chip after manufacturing

Advanced learning objectives:

  • Learn to model the system and carry out the design at several abstraction layers
  • Know how to manage multiple versions and design configurations
  • Acquire skills in virtual prototyping and FPGA emulation of the chips
  • Learn verification methods and standards, and learn the design for test practices
  • Understand HW/SW interfacing and HW dependent SW development
  • Evaluate the performance, reliability, power consumption and cost of SoC designs and compare different design alternatives
  • Working in a multi-disciplined team using modern collaboration tools and understanding the design process management practices
Study module code
STEM-JPY
Language of learning
Finnish
English
Academic years
2024–2025, 2025–2026, 2026–2027
Level of study
Advanced studies
Fields of study
Engineering, Manufacturing and Construction
Persons responsible
Responsible teacher:
Terhi Kilamo, Tutkinto-ohjelmavastaava
Prerequisites
Further information
Studies that include this module
Study module code
STEM-JPY
Language of learning
Finnish
English
Academic years
2024–2025, 2025–2026, 2026–2027
Level of study
Advanced studies
Fields of study
Engineering, Manufacturing and Construction
Persons responsible
Responsible teacher:
Terhi Kilamo, Tutkinto-ohjelmavastaava