Digital Design, 5 op

Core content

• Specification, design and analysis of synchronous logic. Different levels of description abstractions in digital systems.
• Combinational gate networks. Two and multi-level gate networks. Critical path and maximum clock frequency.
• Sequential networks. Mealy and Moore state machines. Timing analysis and determination of clock speed.
• Standard modules. Connecting modules using bus structures. Data and control paths. Register Transfer Level.
• FPGA architecture and usage in digital design. Design tools and methodologies.

Complementary knowledge

• The Y-model: behaviour, architecture and mapping. Hierarchical design.
• Propagation delay. Fan-in and fan-out. Loading of the gates.
• Extended state machines with memory. Registered state machine.
• Two's complement representation. Binary addition, subtraction, and multiplication.
  
• FPGA boards with peripherals. Practical designs.
• Understanding data sheets.